Conclusion
- All 3 boards (EM, LVL0, LVL1) are ready for testing
- The time to generate LVL0 pulse is 21.5 ns (triggered) or 11 ns (non-triggered).
- The delay of the LVL1 circuit is 49 ns
- Most of the resources on the board are programmable from VME
- More features can easily be added. (The Design cycle = 5 min)