Notes for Vertex Detector Readout
The Vertex Detector Readout Scheme is still in a state of flux so I have made the following assumptions in implementing the Vertex Readout. Please note that these assumptions are likely to change as the Hardware is designed!
<<<<<--- readout this way readout this way --->>>>
XXX |--------------------------------| |--------------------------------|XXX flex| 3 2 1 0 3 2 1 0 | | 3 2 1 0 3 2 1 0 |flex XXX |--------------------------------| |--------------------------------|XXX | | | | | | | | | | | | | | | | ------------ ------------ ------------ ------------ | B| | B| | B| | B| | | | | | | | | | sens 0 | | sens 1 | | sens 2 | | sens 3 | | | | | | | | | | | | | | | | | | T| | T| | T| | T| ------------ ------------ ------------ ------------ +Z <<<--- --->>> -Z ------------ ------------ ------------ ------------ | B| | B| | B| | B| | | | | | | | | | | | | | | | | | |+X | sens 3 | | sens 2 | | sens 1 | | sens 0 | | | | | | | | | | V | | | | | | | | V | T| | T| | T| | T| ------------ ------------ ------------ ------------ | | | | | | | | | | | | | | | | XXX |--------------------------------| |--------------------------------|XXX flex| 3 2 1 0 3 2 1 0 | | 3 2 1 0 3 2 1 0 |flex XXX |--------------------------------| |--------------------------------|XXX (64 Channel Chips)
<<<<<--- readout this way readout this way --->>>>
B - Marks the Pad labelled (Row=0, Col=0) for the Bottom-side Outer Vertex
T - Marks the Pad labelled (Row=0, Col=0) for the Top-side Outer Vertex
<<<<<--- readout this way readout this way --->>>>
XXX |--------------------------------| |--------------------------------|XXX flex| 3 2 1 0 3 2 1 0 | | 3 2 1 0 3 2 1 0 |flex XXX |--------------------------------| |--------------------------------|XXX | | | | | | | | | | | | | | | | ------------ ------------ ------------ ------------ | B| | B| | B| | B| | | | | | | | | | sens 0 | | sens 1 | | sens 2 | | sens 3 | | | | | | | | | | | | | | | | | | T| | T| | T| | T| ------------ ------------ ------------ ------------ +Z <<<--- (128 Channel Chips) --->>> -Z
The co-ordinate convention used in numbering Rows and Columns is the Phat one: i.e.
Row = 0 to MaxRow with increasing Z
Col = 0 to MaxCol with increasing Phi.