The Compact Linear Collider (CLIC) study is an international collaboration working on a concept for a machine to collide electrons and antielectrons at energies up to 3 TeV. By using fundamental particles like electrons/antielectrons (rather than protons as in the Large Hadron Collider), and unique combination of experimental precision and high energy, the particle physics community would gain a different perspective on the laws of nature. The ongoing development of the CLIC detector to record the collisions is mainly driven by precision physics under challenging beam and background conditions, which lead to a number of cutting-edge R&D activities. This seminar will cover one of these activities, specifically the second generation of a silicon hybrid pixel readout chip, named CLICpix2, conceived for the vertex detector. This application-specific integrated circuit was designed in a 65 nm CMOS technology with a remarkable pixel pitch of 25 µm, including an in-pixel analog frontend as well as a digital backend, which allow simultaneous time (8-bit time of arrival) and energy (5-bit time over threshold) measurements. The readout chip also features selectable data compression and power pulsing, enabling an average power dissipation below 50 mW/cm^2. The in-pixel and in-periphery analog circuitry will be covered in depth, highlighting the main challenges faced during the design, which include small area, low noise, and low power. The in-pixel digital backend, digital readout, and digital slow control will be covered as well, but quickly. The preliminary measured results will be presented, and compared to simulated ones.