|
Byte |
|
|
|
00 |
Temp |
Temperature of the hybrid’s substrate |
|
01 |
MVbc |
Bias voltage applied to the back contact of the sensors,
served by hybrid |
|
02 |
MIbc |
Total leakage current in the sensors served by the hybrid/FEC
port |
|
03 |
OutBias |
The bus voltage which feeds the 3.6 kohm resistors which
in turn set up the bias current in the output circuit of their respective VA
chip |
|
04 |
ShaBias |
The bus voltage which feeds the 30 kohm resistors which
in turn set up the bias current in the shaper stage of their respective VA
chips |
|
05 |
PreBias |
The bus voltage which feeds the 2.4 kohm resistors which
in turn set up the bias current in the preamplifier stage of their respective
VA chips |
|
06 |
Vfs |
The Bus voltage which controls the feedback resistance
across the shaper stage of the respective chips |
|
07 |
Vfp |
The Bus voltage which controls the feedback resistance
across the preamplifier stage of the respective chips |
|
08 |
… Port 1 |
Temp, MVbc, Mibc, OutBias, ShaBias, PreBias, Vfs, Vfp
for Port 1 |
|
16 |
… Port 2 |
Temp, MVbc, Mibc, OutBias, ShaBias, PreBias, Vfs, Vfp
for Port 1 |
|
24 |
… Port 3 |
Temp, MVbc, Mibc, OutBias, ShaBias, PreBias, Vfs, Vfp
for Port 1 |
|
32 |
Mode |
Bits 0:1. 2-Calibration, 3-Normal |
|
33 |
FEC# |
Bits 0:7 |
|
34 |
StatErr |
Bits 0:1. |
|
35 |
FIFOUnlErr |
Bits 0:7 Each bit represent string |
|
36 |
0 |
|
|
37 |
ShiftErr |
Each bit represent string |
|
38 |
10101010 |
EOF |
|
39 |
10101010 |
EOF |
|
40 |
DMUErr1 |
1-GLink, 2-Parity, 4-PIO2, 8-BusyDMU, 10-NoDVal,
20-NoDVAL+BMDB, 40-NoDMU |
|
41 |
DMUErr0 |
20-SeqReset,40-L2Err, 80-FECErr |
|
42 |
WMiss1 |
|
|
43 |
WMiss0 |
Number of missed words. Should be 0 when no errors |
|
44 |
CMD |
Last command written Bits 4:7 = 0xb – intermediate FEC, =0xf – last FEC in
chain Bit 3 – Crate number |
|
45 |
DMU# |
Bits 0:5. DMU channel number |
|
46 |
EvN1 |
Event number, bits 08:15 |
|
47 |
EvN0 |
Event Number, bits 00:07 |
|
|
|
|
STAT ERROR bit0 = HEADER
bit08 = is set to one if during B1 new L1 is issued.
STAT ERROR bit1 = HEADER
bit09 = is set to one if L2 is issued and there is not HOLD signal.
STAT ERROR bit2 = HEADER
bit10 = is set to one if during busy B2 signal new L2 is issued.
STAT ERROR bit3 = HEADER
bit11 = is set to one if system load error appear.
FEC41[4976]
strings: 768 768 768 768 768 768 768 768
Trailer:
801b9180
aa7b6da3
9f269080
a97a6da2
a1169080
a97a6da2
8014917f
a97b6da3
03290000
00ffaaaa 80000000 f80a00e3
32333445 36373839 40414243 44454647
160:
41 0 128 27 145 128 170 123 109 163
161:
41 1 159 38 144 128 169 122 109 162
162:
41 2 161 22 144 128 169 122 109 162
163:
41 3 128 20 145 127 169 123 109 163