Wednesday, February 3, 2010, 2:30 pm — Large Seminar Room, Bldg. 535
Stringent power requirements in the chips by the International Technology Roadmap for Semiconductors (ITRS) dictate replacement of silicon dioxide as it has already reached the direct tunneling regime. Therefore, for high speed and low power applications high-k dielectric materials are being integrated into standard CMOS technologies. At present, reliability requirements of advanced gate stacks with high-k dielectrics with metal gates are of intensive research interests as these high-k dielectrics needs to meet the silicon dioxide standards. In this talk some of the on-going research work on charge trapping in high-k dielectrics such as HfO2 and HfSixOy will be discussed. Detection mechanism of electrically active intrinsic traps will be outlined. Based on the negative bias temperature instability (NBTI) the results will be correlated with theoretical models. Breakdown measurements of HfO2 and HfSixO will be discussed with respect to poly and metal gates. High-k on alternate substrates like Ge substrate will also be introduced.
6133 | INT/EXT | Events Calendar
Not all computers/devices will add this event to your calendar automatically.
A calendar event file named "calendar.ics" will be placed in your downloads location. Depending on how your device/computer is configured, you may have to locate this file and double click on it to add the event to your calendar.
Event dates, times, and locations are subject to change. Event details will not be updated automatically once you add this event to your own calendar. Check the Lab's Events Calendar to ensure that you have the latest event information.