Wednesday, June 25, 2014, 2:30 pm — Large Conference Room, Bldg. 535
Firstly, we show that the degradation caused by high-energy neutrons in planar fully depleted (FD) and multiple-gate (MuG) SOI MOSFETs is largely similar to that caused by γ-rays with similar doses. Secondly, a comparative investigation of high-energy neutrons effects on strained and non-strained devices reveals a clear difference in their response to high energy neutrons exposure. Finally, based on simulations and modeling of partially-depleted (PD) SOI digital circuits, we demonstrate how radiation-induced oxide charge and interface state build-up can affect the well-known tolerance of SOI devices to transient effects.
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