Electro-photonic Processor Architectures
Objectives
Integrated co-design of novel electro-photonic processing and networking architectures that leverage the benefits of performing large-scale computations and communication in optical-domain, while optimally partitioning tasks between electrical and optical domains.
Development of frameworks, tools and methodologies for enabling an automated, holistic, hardware-aware, top-down design approach.
Design partitioning and optimization approaches
- Design partitioning between electrical and photonic domains driven by metrics such as latency, power consumption, communication bandwidth, throughput, complexity, reliability and cost, noise, interference
- Tools to incorporate methods for efficient computation of linear operations
- Optimizing data flow and buffering, mitigation of congestion
- Efficient distribution of computational and communication loads
- Usage of photonic interconnects to reduce latency and improve transmission bandwidth (for e.g. between processing and memory sub-systems)
- Network slicing, dynamic adjustment of network partitioning, data-driven decision making
-

Prashansa Mukim
(631) 344-6239, pmukim@bnl.gov
-

Partner Institutions
Industry Collaborator
Industry Liaison